1. Field of the Invention
The present invention relates to a semiconductor memory device, particularly to a semiconductor memory device having a defective bit relieving circuit.
2. Background Information
A defective bit relieving circuit (redundancy circuit) replaces a defective memory cell with a spare memory cell and is very convenient for improving the production yield of a semiconductor memory.
Accordingly, the redundancy circuit is currently widely used in many semiconductor memories and is disclosed in various publications such as Japanese Patent Laid-Open Publication No. 1-229498 issued on Sep. 13, 1989 and U.S. Pat. No. 4,346,459 issued on Aug. 24, 1982.
The present invention, described below, should be understood together with the known redundancy circuits as disclosed in these publications. The object of the present invention is to provide a redundancy circuit which is more flexible than that disclosed in these publications.